For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...

The traditional approach to moving scan test data from chip-level pins to core-level scan channels is under pressure due to the dramatic rise in design size, design complexity, and test adaptation. To ...

My colleagues from Mentor Graphics, Ron Press, Martin Keim, and I often write about various aspects of digital IC test. If you started following the Test Voices blog when it was part of Test & ...

The exponential growth in design sizes has rendered the traditional methods of design-for-test, layout, and timing closure no longer sufficient. Design and test engineers not only have to constantly ...