EDN

Synopsys Delivers 2x Verification Speed-up With VCS Multicore Technology

MOUNTAIN VIEW, Calif., April 6 /PRNewswire-FirstCall/ — Synopsys, Inc. , a world leader in software and IP for semiconductor design and manufacturing, today ...
Design-Reuse

Synopsys Introduces VCS Verification Library to Speed Verification by Up to 5X

Verification IP Product Combines with Advanced Methodologies and Tools to Deliver a High-Performance Integrated Verification Environment MOUNTAIN VIEW, Calif. -- Sept. 26, 2005-- Synopsys, Inc.
Design-Reuse

Faraday Verifies Complex CPU Cores with Synopsys' VCS and Vera Verification Solutions

Advanced Coverage and Testbench Technologies in the Synopsys Discoveryâ„¢ Verification Platform Enable Robust Validation of Faraday's Processor IP MOUNTAIN VIEW, Calif. and HSINCHU, Taiwan, May 10, ...
Semiconductor Engineering

Extending Digital Verification Techniques For Mixed-Signal SoCs With VCS AMS

Increasing IP use and tighter integration between analog and digital are increasing the need for test bench automation for mixed-signal designs. The growth in mixed-signal system-on-chip (SoC) designs ...
EDN

VSIA Releases Functional Verification Taxonomy For SOCs, VCs

The Virtual Socket Interface Alliance's (VSIA) Functional Verification Working Group (DWG) today released a document that defines a range of terms related to functional verification of ...
Electronic Design

Intellitech brings IEEE 1149.1-2013 IP block verification to Synopsys VCS

Dover, NH. Intellitech Corp. has announced interoperability between its NEBULA silicon debugger, the Intellitech iJTAGServer bridge, and the Synopsys VCS functional-verification environment. The ...